ELE113 HW/SW System Design

Contents and structure

The course uses FPGA technology to design Embedded Systems. This involves setting up a computer-architecture with a CPU and peripherals, as well as Hardware design in VHDL and software design in C. The course starts out with general FPGA design where the focus is the constraints given when designing real-life applications. Further, the focus is on the physical and logical elements that are important for an Embedded System. Deployment of a lightweight OS on an Embedded Platform is also touched.

Practical experience in designing Embedded Systems is gained through several laboratory exercises and one larger project assignment.

Content

• Understanding the behavior of the physical components of an embedded system (memory, CPU, etc.)
• Understanding the behavior of the logical components and architecture of an embedded system, including the use of an operating system
• Verification and testing of digital designs and embedded systems
• Project methodology and documentation
• HW design with VHDL. Special focus on constraints for FPGA s( Timing, IO standards and more )
• SW design with C for embedded systems
• Laboratory exercises using Altera development tools for designing embedded systems on FPGA s including CPU, external memory and other peripheral devices

Learning Outcome

At the end of the course the candidate has the following total learning outcome:

Knowledge

• Structure and limitations for FPGA applications
• Function and architecture of an embedded system
• Methods for verification and testing
• Real time operating system
• Standard project methodology

Skills

• Candidates can apply and adapt their knowledge to identify, formulate, specify, plan and solve problems related to HW / SW system design in a systematic way
• Candidates can apply the languages VHDL and C in developing an embedded system.

General competence

• The candidate has knowledge of how to use programmable logic to solve technological challenges.
• The candidate can participate in relevant discussions, knows how to share his /her knowledge, and experiences with others and contribute to development of good practice.
• The candidate is capable of updating his knowledge within his discipline

Entry requirements

• Course in digital design with VHDL/Verilog
• Course in software design with C

Teaching methods

Lectures

Practical training, alone and in groups.

Compulsory learning activities

5 mandatory assignments.

Valid mandatory assignments are valid in 3 semesters following approval.

Assessment

4 hours written exam. In case 8 candidates or less are registered, the examination may be oral.

The grading scale used is A to F. Grade A is the highest passing grade in the grading scale, grade F is a fail.

Examination support material

Informed at start of semester.

More about examination support material